LPC1114

Memory Map

Address	Feature
0x0000 0000-0x0000 00C0	active interrupt vector
0x0000 0000-0x0000 8000	32KB Flash
0x1000 0000-0x1000 0800	4KB SRAM
0x1FFF 0000-0x1FFF 4000	boot ROM
0x4000 0000-0x4008 0000	APB Peripherals
0x5000 0000-0x5020 0000	AHB Peripherals
0xE000 0000-0xE010 0000	private peripheral bus

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active interrupt vector

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APB Peripherals

0	0x4000 0000	I2C-bus
1	0x4000 4000	WDT
2	0x4000 8000	UART
3	0x4000 C000	16 bit counter/timer 0
4	0x4001 0000	16 bit counter/timer 1
5	0x4001 4000	32 bit counter/timer 0
6	0x4001 8000	32 bit counter/timer 1
7	0x4001 C000	ADC
14	0x4003 8000	PMU
15	0x4003 C000	Flash Control
16	0x4004 0000	SPI0
17	0x4004 4000	IOCONFIG
18	0x4004 8000	system control

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PMU 0x4003 8000

Name	Access	Address offset	Description	Reset value
PCON	R/W	0x000	Power control register	0x0
GPREG0	R/W	0x004	General purpose register 0	0x0
GPREG1	R/W	0x008	General purpose register 1	0x0
GPREG2	R/W	0x00C	General purpose register 2	0x0
GPREG3	R/W	0x010	General purpose register 3	0x0
GPREG4	R/W	0x014	General purpose register 4	0x0

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IOCONFIG 0x4004 4000

Name	Access	Address offset	Bit 0:1 Func Description				bit 2:32	Reset value
Name	Access	Address offset	00	01	10	11	bit 2:32	Reset value
IOCON_RESET_PIO0_0	R/W	0x00C	RESET	PIO0_0			#mho	0xD0
IOCON_PIO0_1	R/W	0x010	PIO0_1	CLKOUT	CT32B0 _MAT2		#mho	0xD0
IOCON_PIO1_8	R/W	0x014	PIO1_8	CT16B1 _CAP0			#mho	0xD0
IOCON_PIO0_2	R/W	0x01C	PIO0_2	SSEL0	CT16B0 _CAP0		#mho	0xD0
IOCON_PIO0_3	R/W	0x02C	PIO0_3				#mho	0xD0
IOCON_PIO0_4	R/W	0x030	PIO0_4	SCL			#icm	0x00
IOCON_PIO0_5	R/W	0x034	PIO0_5	SDA			#icm	0x00
IOCON_PIO1_9	R/W	0x038	PIO1_9	CT16B1 _MAT0			#mho	0xD0
IOCON_PIO0_6	R/W	0x04C	PIO0_6		SCK0 !!		#mho	0xD0
IOCON_PIO0_7	R/W	0x050	PIO0_7	CTS			#mho	0xD0
IOCON_PIO0_8	R/W	0x060	PIO0_8	MISO0	CT16B0 _MAT0		#mho	0xD0
IOCON_PIO0_9	R/W	0x064	PIO0_9	MOSI0	CT16B0 _MAT1		#mho	0xD0
IOCON_SWCLK_PIO0_10	R/W	0x068	SWCLK	PIO0_10	SCK0!!!	CT16B0 _MAT2	#mho	0xD0
IOCON_PIO1_10	R/W	0x06C	PIO1_10	AD6	CT16B1 _MAT1		#mhao	0xD0
IOCON_R_PIO0_11	R/W	0x074	R	PIO0_11	AD0	CT32B0 _MAT3	#mhao	0xD0
IOCON_R_PIO1_0	R/W	0x078	R	PIO1_0	AD1	CT32B1 _CAP0	#mhao	0xD0
IOCON_R_PIO1_1	R/W	0x07C	R	PIO1_1	AD2	CT32B1 _MAT0	#mhao	0xD0
IOCON_R_PIO1_2	R/W	0x080	R	PIO1_2	AD3	CT32B1 _MAT1	#mhao	0xD0
IOCON_SWDIO_PIO1_3	R/W	0x090	SWDIO	PIO1_3	AD4	CT32B1 _MAT2	#mhao	0xD0
IOCON_PIO1_4	R/W	0x094	PIO1_4	AD5	CT32B1 _MAT3		#mhao	0xD0
IOCON_PIO1_11	R/W	0x098	PIO1_11	AD7			#mhao	0xD0
IOCON_PIO1_5	R/W	0x0A0	PIO1_5	RTS	CT32B0 _CAP0		#mho	0xD0
IOCON_PIO1_6	R/W	0x0A4	PIO1_6	RXD	CT32B0 _MAT0		#mho	0xD0
IOCON_PIO1_7	R/W	0x0A8	PIO1_7	TXD	CT32B0 _MAT1		#mho	0xD0
IOCON_SCK_LOC	R/W	0x0B0	SCK pin location select register					0x00
IOCON_DSR_LOC	R/W	0x0B4	DSR pin location select register					0x00
IOCON_DCD_LOC	R/W	0x0B8	DCD pin location select register					0x00
IOCON_RI_LOC	R/W	0x0BC	RI pin location register					0x00

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Bit2:31 type1

Bit	Symbol	Value	Description	Reset value
2:0	FUNC		Selects pin function. see above #ioconfig
4:3	MODE		Selects function mode (on-chip pull-up/pull-down resistor control).	10
		0x0	Inactive (no pull-down/pull-up resistor enabled).
		0x1	Pull-down resistor enabled.
		0x2	Pull-up resistor enabled.
		0x3	Repeater mode.
5	HYS		Hysteresis.	0
		0	Disable.
		1	Enable.
9:6	-	-	Reserved	0011
10	OD		Selects pseudo open-drain mode.	0
			0	Standard GPIO output
		1	Open-drain output
31:11	-	-	Reserved

The open-drain mode is not available for the LPC111x/101/201/301 parts.

#top #apb #ioconfig

Bit2:31 type2 with AD

Bit	Symbol	Value	Description	Reset value
2:0	FUNC		Selects pin function.see above #ioconfig
4:3	MODE		Selects function mode (on-chip pull-up/pull-down resistor control).	10
		0x0	Inactive (no pull-down/pull-up resistor enabled).
		0x1	Pull-down resistor enabled.
		0x2	Pull-up resistor enabled.
		0x3	Repeater mode.
5	HYS		Hysteresis.	0
		0	Disable.
		1	Enable.
6	-	-	Reserved	1
7	ADMODE		Selects Analog/Digital mode	1
		0	Analog input mode
		1	Digital functional mode
9:8	-	-	Reserved	00
10	OD		Selects pseudo open-drain mode.	0
		0	Standard GPIO output
		1	Open-drain output
31:11	-	-	Reserved

The open-drain mode is not available for the LPC111x/101/201/301 parts.

#top #apb #ioconfig

I2C Mode

Bit	Symbol	Value	Description	Reset value
2:0	FUNC		Selects pin function.
7:3	-		Reserved.	00000
9:8	I2CMODE		Selects I2C mode. Select Standard mode (I2CMODE = 00,default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 000).	00
		0x0	Standard mode/ Fast-mode I2C.
		0x1	Standard I/O functionality
		0x2	Fast-mode Plus I2C
		0x3	Reserved.
31:10	-	-	Reserved.	-

#top #apb #ioconfig

IOCON_SCK_LOC

Bit	Symbol	Value	Description	Reset value
1:0	SCKLOC		Selects pin location for SCK0 function.	00
		0x0	Selects SCK0 function in pin location SWCLK/PIO0_10/SCK0/CT16B0_MAT2
		0x1	Selects SCK0 function in pin location PIO2_11/SCK0
		0x2	Selects SCK0 function in pin location PIO0_6/SCK0
		0x3	Reserved.
31:2	-	-	Reserved.

#top #apb #ioconfig

IOCON_DSR_LOC

Bit	Symbol	Value	Description	Reset value
1:0	DSRLOC		Selects pin location for DSR function.	00
		0x0	Selects DSR function in pin location PIO2_1/DSR/SCK1.
		0x1	Selects DSR function in pin location PIO3_1/DSR.
		0x2	Reserved.
		0x3	Reserved.
31:2	-	-	Reserved.

#top #apb #ioconfig

IOCON_DCD_LOC

Bit	Symbol	Value	Description	Reset value
1:0	DCDLOC		Selects pin location for DCD function.	00
		0x0	Selects DCD function in pin location PIO2_2/DCD/MISO1.
		0x1	Selects DCD function in pin location PIO3_2/DCD.
		0x2	Reserved.
		0x3	Reserved.
31:2	-	-	Reserved.

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IOCON_RI_LOC

Bit	Symbol	Value	Description	Reset value
1:0	RILOC		Selects pin location for RI function.	00
		0x0	Selects RI function in pin location PIO2_3/RI/MOSI1.
		0x1	Selects RI function in pin location PIO3_3/RI.
		0x2	Reserved.
		0x3	Reserved.
31:2	-	-	Reserved.	-

#top #apb #ioconfig

System Control Block

Name	Access	Address offset	Description	Reset
SYSMEMREMAP	R/W	0x000	System memory remap	0x002
PRESETCTRL	R/W	0x004	Peripheral reset control	0x000
SYSPLLCTRL	R/W	0x008	System PLL control	0x000
SYSPLLSTAT	R	0x00C	System PLL status	0x000
SYSOSCCTRL	R/W	0x020	System oscillator control	0x000
WDTOSCCTRL	R/W	0x024	Watchdog oscillator control	0x000
IRCCTRL	R/W	0x028	IRC control	0x080
SYSRSTSTAT	R/W	0x030	System reset status register	0x000
SYSPLLCLKSEL	R/W	0x040	System PLL clock source select	0x000
SYSPLLCLKUEN	R/W	0x044	System PLL clock source update enable	0x000
MAINCLKSEL	R/W	0x070	Main clock source select	0x000
MAINCLKUEN	R/W	0x074	Main clock source update enable	0x000
SYSAHBCLKDIV	R/W	0x078	System AHB clock divider	0x001
SYSAHBCLKCTRL	R/W	0x080	System AHB clock control	0x85F
SSP0CLKDIV	R/W	0x094	SPI0 clock divider	0x000
UARTCLKDIV	R/W	0x098	UART clock divider	0x000
SSP1CLKDIV	R/W	0x09C	SPI1 clock divider	0x000
WDTCLKSEL	R/W	0x0D0	WDT clock source select	0x000
WDTCLKUEN	R/W	0x0D4	WDT clock source update enable	0x000
WDTCLKDIV	R/W	0x0D8	WDT clock divider	0x000
CLKOUTCLKSEL	R/W	0x0E0	CLKOUT clock source select	0x000
CLKOUTUEN	R/W	0x0E4	CLKOUT clock source update enable	0x000
CLKOUTCLKDIV	R/W	0x0E8	CLKOUT clock divider	0x000
PIOPORCAP0	R	0x100	POR captured PIO status 0	user dependent
PIOPORCAP1	R	0x104	POR captured PIO status 1	user dependent
BODCTRL	R/W	0x150	BOD control	0x000
SYSTCKCAL	R/W	0x154	System tick counter calibration	0x004
IRQLATENCY	R/W	0x170	IQR delay. Allows trade-off between interrupt latency and determinism.	0x10
NMISRC	R/W	0x174	NMI source selection	0x000
STARTAPRP0	R/W	0x200	Start logic edge control register	0
STARTERP0	R/W	0x204	Start logic signal enable register	0
STARTRSRP0CLR	W	0x208	Start logic reset register 0	n/a
STARTSRP0	R	0x20C	Start logic status register 0	n/a
PDSLEEPCFG	R/W	0x230	Power-down states in Deep-sleep mode	0x0000 0000
PDAWAKECFG	R/W	0x234	Power-down states after wake-up from Deep-sleep mode	0x0000 EDF0
PDRUNCFG	R/W	0x238	Power-down configuration register	0x0000 EDF0
DEVICE_ID	R	0x3F4	Device ID register 0 for parts LPC1100, LPC1100C, LPC1100L.	part dependent

#top #scb #apb

System memory remap 0x4004 8000

Bit	Symbol	Value	Description	Reset value
1:0	MAP		System memory remap	10
		0x0	Boot Loader Mode. Interrupt vectors are re-mapped to Boot ROM.
		0x1	User RAM Mode. Interrupt vectors are re-mapped to Static RAM.
		0x2	User Flash Mode. Interrupt vectors are not re-mapped and reside in Flash.
31:2	-	-	Reserved	0x00

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AHB Peripherals

0-3	0x5000 0000	GPIO PIO0
4-7	0x5001 0000	GPIO PIO1

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lpc21isp

そのままではLPC1114FNがデバイスリストに登録されていない
lpcprog.cの116行目(LPCtypes配列の要素中)に次の一行を追加。
{ 0x1A40902B, "1114FN.../102", 32, 4, 8, 1024, SectorTable_17xx, CHIP_VARIANT_LPC11XX },

===> lpc21isp-1.94 は追加されていた。